Sigma-delta modulation

ABSTRACT

Sigma-delta modulation is provided, comprising feeding an input signal to a first SDM, subtracting the output of the first SDM from the input signal, filtering the output of the subtracting to obtain a filtered signal, delaying the input signal, adding the filtered signal to the delayed signal, feeding the output of the adder to a second SDM and providing the output of the second SDM. The first SDM in combination with the subtracting and filtering delivers a correction signal which, by adding it to the input signal, reduces the distortion in the second SDM, which second SDM performs in fact the sigma-delta modulation of the device.

This application is a continuation of PCT/IB02/04534 Oct. 28, 2002.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to sigma-delta modulation.

2. Description of the Related Art

A Sigma-Delta-Modulator (SDM) transforms a bandlimited input signal intoa digital output signal. The input signal modulates the output pulsedensity. FIG. 1 illustrates an example of a SDM signal. The input signalcan be reclaimed by low-pass filtering the output signal. FIG. 2illustrates the basic structure of a conventional SDM 10. The SDM 10includes an adder 12, a loop filter 14, and a quantizer 16. SDMs may beimplemented as analog or digital SDMs.

The clock frequency f_(a) of the SDM 10 should be much higher than thehighest frequency of the input signal U_(e). To get a sufficiently highsignal-to-noise-ratio from the digital output of a CD-player (16bit/44.1 kHz) oversampling by a factor of at least 32 is generallynecessary. For a digital SDM, the input signal should be supplied withthis high data rate. This may be achieved by using a digitalinterpolation filter.

In the simplest case, the loop filter 14 may be implemented as anintegrator. FIGS. 3 and 4 illustrate an analog 141 and a digital 142integrator, respectively.

The loop filter 14 determines the resolution (S/N-ratio) of the SDM 10.By using a loop filter 14 of higher order, a better S/N-ratio can beachieved, but stability problems may arise.

The threshold of the quantizer 16 is normally zero. The output signalU_(a) of the quantizer 16 is +1, if the input signal to the quantizer 16U_(k)>0 and −1, if U_(k)<0. The quantizer 16 changes its output witheach new clock cycle.

As an example, an analog SDM with an input signal of zero and a firstorder loop filter operates as follows. When starting, the SDM 10 outputis +1. The loop back to the input provides a new input to the loopfilter 14 of −1 (input signal (0)−output signal (+1)=−1). The output ofthe loop filter 14 U_(k) slowly decreases to the negative supply rail.Therefore, the next clock cycle sets the quantizer 16 output to −1. Thisgives a new input to the loop filter 14 of +1 (input (0)−output(−1)=+1). U_(k) now drifts to positive values. The output of the SDM 10now is a random stream of bits (+1 and −1). FIG. 5 illustrates thevalues of U_(a) and U_(k) at various times. If the input signal U_(e) ofthe SDM 10 is zero, the average of the output U_(a) is also zero. Whenmodulating the SDM 10, the appearance and sequence of +1 and −1 pulseschanges accordingly to the input signal U_(e).

To examine the SDM 10 in the frequency domain, it advantageous tosubstitute the quantizer 16 with an adder 18, a noise source N(z), and aquantizing amplifier 20 with gain g_(Q). From FIG. 6 two transferfunctions are obtained, the signal transfer function H_(X)(z) and thenoise transfer function H_(N)(z).If $\begin{matrix}{z = {\mathbb{e}}^{j\quad\frac{\omega}{\omega_{g}}}} & (1)\end{matrix}$then: $\begin{matrix}{{H_{X}(z)} = {\frac{Y(z)}{X(z)} = \frac{g_{Q}{H_{lf}(z)}}{1 + {g_{Q}{H_{lf}(z)}}}}} & (2) \\{{H_{N}(z)} = {\frac{Y(z)}{N(z)} = \frac{1}{1 + {g_{Q}\left( {H_{lf}(z)} \right)}}}} & (3)\end{matrix}$where g_(Q) is the quantizer gain.

FIG. 7 illustrates two different noise transfer functions H_(N)(z) for aSDM 10 with a 4th order loop filter with different gains. The noisetransfer function H_(N)(z) shows a strong rejection of the frequenciesin the audio range (f/f_(a)=0 . . . 0.01). High frequencies areamplified and passed through. This is also called noise-shaping. Thenoise level in the audio frequency band may be lowered by increasing theorder of the loop filter 14.

There are three possible implementations of a SDM 10, an analog SDM, adigital SDM, and an SDM with a switched capacitor filter (SC-filter).Different applications require different implementations. For example,for an A/D-converter, either the analog SDM or the SC-SDM would beappropriate. For a D/A-converter, the digital SDM is the best choice.

Conventional SDMs are well-known for their insensitivity to analogimperfections, and therefore they are appropriate for a large number ofapplications. Their usefulness has led to the adoption of the DirectStream Digital, or DSD, format (the single bit output of an SDM) as thedata format for Super Audio CD (SACD). It is believed that the datastream on the SACD can be derived from the A/D conversion step withminimal additional signal processing, thus leading to the highestquality possible. However, conventional SDMs themselves produces signalartifacts, which are due to the non-linear character of the quantizer 16in the SDM 10. These effects are shown in FIG. 8, where odd harmonicdistortion products can be clearly observed.

SUMMARY OF THE INVENTION

An object of the invention is to provide advantageous sigma-deltamodulation.

To this end, the present invention provides a sigma-delta modulatingdevice and a method as defined in the independent claims. Advantageousembodiments are defined in the dependent claims.

According to a first aspect of the invention, the sigma-delta modulationcomprises feeding an input signal to a first SDM, subtracting the outputof the first SDM from the input signal, filtering the output of thesubtracting to obtain a filtered signal, delaying the input signal,adding the filtered signal to the delayed signal, feeding the output ofthe adder to a second SDM and providing the output of the second SDM.The first SDM in combination with the subtracting and filtering deliversa correction signal which, by adding it to the input signal, reduces thedistortion in the second SDM, which second SDM performs in fact thesigma-delta modulation of the device.

In a further exemplary embodiment of the present invention, the firstand second SDMs are identical SDMs. Identical SDMs are desirable inpractical embodiments in order to achieve better results.

In a further exemplary embodiment of the present invention, the firstSDM includes a filter in parallel to reduce phase shift errors.

Advantages of the present invention will become more apparent from thedetailed description provided hereafter. However, it should beunderstood that the detailed description and specific examples, whileindicating preferred embodiments of the present invention, are given byway of illustration only, since various changes and modifications withinthe spirit and scope of the invention will become apparent to thoseskilled in the art from this detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become more fully understood from thedetailed description given below and the accompanying drawings, whichare given for purposes of illustration only, and thus do not limit theinvention.

FIG. 1 illustrates an example of a SDM signal.

FIG. 2 illustrates the basic structure of a conventional SDM.

FIG. 3 illustrates a conventional analog integrator.

FIG. 4 illustrates a conventional digital integrator.

FIG. 5 illustrates the values of the output U_(a) of the SDM 10 and theoutput U_(k) of the loop filter 14.

FIG. 6 illustrates the SDM 10 in the frequency domain.

FIG. 7 illustrates two different noise transfer functions H_(N)(z) foran SDM 10 with a 4th order loop filter.

FIG. 8 illustrates signal artifacts, which are due to the non-linearcharacter of the quantizer 16 in the SDM 10.

FIG. 9 illustrates a low-order, undithered sigma-delta modulatingdevice, in one exemplary embodiment of the present invention.

FIG. 10 illustrates a comparison of the output signal from a singleconventional SDM with the output from the sigma-delta modulating deviceof FIG. 9.

FIG. 11 illustrates a sigma-delta modulating device, in anotherexemplary embodiment of the present invention.

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

Embodiments of the present invention are directed to a sigma-deltamodulating device wherein non-linearities are reduced. The embodimentsare based on the following insight:

If a SDM is modelled as a non-linear element, with the followinginput-output (x→y) characteristic:y=x+α ₃ x ³  (4)when the input signalV′=x−α ₃ x ³  (5)is fed into the model, the result is an output signal y′; wherey′=V′+α ₃ V′ ³ =x−α ₃ x ³+α₃ (x−α ₃ x ³)³ =x+α ₃ ² O(x ⁵)  (6)In this way, the harmonic distortion generated by the SDM issignificantly reduced. In practice, the number of distortion products inEq. (4) is much larger, and the input signal can be adjusted accordinglyto remove most of the distortion.

An exemplary sigma-delta modulating device 100, which accomplishes thismodel in the digital domain, is shown in FIG. 9. The sigma-deltamodulating device 100 includes a first conventional SDM 102, a filter104, a delay 106, and a second conventional SDM 108.

The input signal is passed through the SDM 102, after which the outputsignal of this SDM is subtracted from the input signal x. This resultsin the signal v. It is noted that x+v has the characteristics of thesignal V′ in Eq. (5). However, as the output signal of the SDM 102 alsocontains a high amount of high frequency (HF) noise, which in itself isuncorrelated with the input signal x, the filter 104 is provided toremove most of the HF power. The input signal x, after correction forthe delay by filter 104 by delay 106, is also added to the output F(v)of the filter 104 and fed into a second SDM 108, which has the samestructure as SDM 102. Delay 106 may be implemented as a sequence offlip-flops. FIG. 9 essentially implements Eq. (6), showing that thesignal y is a much cleaner signal compared to that obtained from asingle conventional SDM 10.

An exemplary output of the sigma-delta modulating device 100 isillustrated in FIG. 10, where 120 is the output signal from a singleconventional, low-order, undithered, SDM and 122 is the output from thecascade of SDMs of FIG. 9. The improvement is clear.

It is noted that the sigma-delta modulating device 100 of FIG. 9includes two cascaded SDMs, however more SDMs could also be cascaded tofurther reduce the residual terms from Eq. (6). It is further noted thatthe cascade of two or more SDMs may be identical SDMs.

It is further noted that although the sigma-delta modulating device 100of FIG. 9 reduces for amplitude errors (primarily introduced by an SDM10), a sigma-delta modulating device could also correct for phase shifterrors. Phase shift errors are illustrated in FIG. 10, in particular inthe higher frequencies. These phase shift errors may be corrected asillustrated in the exemplary embodiment of FIG. 11.

In the exemplary embodiment of FIG. 11, the sigma-delta modulatingdevice 200 includes a filter 202, added to correct for a (frequencydependent) phase rotation of the input signal to SDM 102. The signal vnow contains only the error signal, which is also phase shifted. Thefilter 204 has a lowpass characteristic to reduce the high frequencynoise. Finally, a delay 206 is used to compensate for all delays. Thedelays may now be a non-integer fraction of the time step (in thedigital domain), therefore, delay 206 might be more complicated than asequence of flip-flops, but still within the skill of an ordinaryartisan.

It is further noted that the model of Eq. (4) is exemplary and anothermodel, known to one of ordinary skill in the art could also be used. Itis further noted that the processing described above is particularuseful in the processing of DSD.

It is further noted that features of the present invention are usablewith many types of SDMs, including analog, digital, SC-filter, dithered,undithered, low order, high order, single-bit, multi-bit or anycombination of these features. It is further noted that non-linearity ismore likely to be a larger problem with single-bit SDMs.

The sigma-delta modulating device according to embodiments of theinvention may be included in a signal processing apparatus. Such anapparatus may be (part of) SACD equipment, e.g. a player. The apparatusmay further be a DSD-AD converter, etc.

It should be noted that the above-mentioned embodiments illustraterather than limit the invention, and that those skilled in the art willbe able to design many alternative embodiments without departing fromthe scope of the appended claims. In the claims, any reference signsplaced between parentheses shall not be construed as limiting the claim.The word ‘comprising’ does not exclude the presence of other elements orsteps than those listed in a claim. The invention can be implemented bymeans of hardware comprising several distinct elements, and by means ofa suitably programmed computer. In a device claim enumerating severalmeans, several of these means can be embodied by one and the same itemof hardware. The mere fact that certain measures are recited in mutuallydifferent dependent claims does not indicate that a combination of thesemeasures cannot be used to advantage.

1. A sigma-delta modulating device (100) for modulating an input signalto obtain an output signal, the modulating device comprising: a firstsigma-delta modulator (102) for sigma-delta modulating the input signala subtractor coupled to the first sigma-delta modulator for subtractingan output of the first sigma-delta modulator from the input signal afilter coupled to the subtractor for filtering an output of thesubtractor to obtain a filtered signal a delay for delaying the inputsignal to obtain a delayed input signal an adder for adding the delayedinput signal to the filtered signal, and a second sigma-delta modulator(108) having an input coupled to an output of the adder and an output toprovide the output signal.
 2. The sigma-delta modulating device (100) asclaimed in claim 1, wherein said first and second sigma-delta-modulators(102,108) include identical sigma-delta-modulators.
 3. The sigma-deltamodulating device (100) as claimed in claim 1, wherein said first andsecond sigma-delta-modulators (102,108) are single-bitsigma-delta-modulators.
 4. The sigma-delta modulating device (100) asclaimed in claim 1, further comprising a filter (202) in parallel withthe first sigma-delta-modulator (102), said firstsigma-delta-modulator/filter pair reducing phase shift errors.
 5. Asignal processing apparatus comprising: an input unit for obtaining abitstream, a sigma-delta modulating device (100) as claimed in claim 1to obtain an output signal, and an output unit to provide said outputsignal.
 6. A method for sigma-delta modulating an input signal to obtainan output signal, the method comprising: feeding the input signal to afirst sigma-delta modulator subtracting in a subtractor an output of thefirst sigma-delta modulator from the input signal filtering an output ofthe subtractor to obtain a filtered signal delaying the input signaladding in an adder the delayed input signal to the filtered signalfeeding an output of the adder to a second sigma-delta modulator, andproviding an output of the second sigma-delta modulator as the outputsignal.